“Optimal Low-Switching Frequency Pulse Width Modulation of Modular Multilevel Converters for Propulsion of All-electric Ship" by Dr. Amarendra Edpuganti

Location and Date: 
Tuesday, 3rd December 2019, 11:30-12:30 AM, Seminar Hall, Second Floor, DESE-CESE Building
Abstract:
Maritime transport has been moving towards all-electric ships due to global climate change concerns. In all-electric ships, medium-voltage dc power system has become popular due to better reliability and high performance energy conversion. For electric propulsion, utilization of modular multilevel converters (MMC) becomes indispensable due to several advantages such as redundancy, low harmonic content, small or no filter requirements and so on. In all-electric ships with high power requirements, low device switching frequency modulation of MMCs is essential to increase semiconductor device utilization, minimize cooling requirements and increase overall system efficiency. However, there exists a trade-off between device switching frequency and harmonic distortion of machine stator currents. Therefore, classical pulse width modulation (PWM) techniques such as sinusoidal PWM and space vector modulation techniques utilize higher device switching frequency (around 1 kHz) to generate good quality of machine stator currents. Synchronous optimal pulsewidth modulation (SOP) is an effective and emerging modulation technique to achieve low device switching frequency operation, while minimizing the harmonic distortion of machine stator currents. The main objective of the seminar is to discuss about the fundamentals of SOP technique along with mathematical analysis and implementation challenges for MMCs. The complete details of proposed SOP technique are presented along with simulation and experimental results to show the efficacy of proposed method. 
 
Biographical sketch:
Dr. Amarendra Edpuganti received the B.Tech. degree in electrical and electronics engineering from the NIT Warangal in 2007, the M.Tech. degree in electrical engineering from the IIT Kanpur in 2012, and the Ph.D. degree in electrical and computer engineering from the National University of Singapore, Singapore, in 2016.  He was a Software Engineer with Adobe Systems, Bangalore, India, from August 2007 to December 2009. Later, he worked as a R&D engineer with the ABB Chennai, from October 2015 to July 2018. During this period, Dr. Amarendra worked in close collaboration with HVDC R&D team in ABB Sweden to develop next generation HVDC converter topology. Currently, he is working in collaboration with MIT, USA as a post-doctoral fellow in Khalifa University, Abu Dhabi, UAE. Dr. Amarendra is an author and co-author of more than 25 research papers published in IEEE transactions and key conferences. Also, he filed two patents while working with ABB. He was awarded 3rd Prize  in IEEE IAS CMD Student Thesis Contest 2016 in the PhD category.