Prof. Mahesh B. Patil received B. Tech. from IIT Bombay in 1984, M.S. from the University of Southern California in 1987 and PhD from the University of Illinois at Urbana-Champaign in 1992, all in Electrical Engineering. He was involved in fabrication of HEMT's  

Academic Background:B. Tech (EE), IIT Bombay, 1984 M.S. (EE), University of Southern California, 1987 Ph.D. (EE), University of Illinois at Urbana-Champaign, 1992 

Research Interests:Circuit simulation Semiconductor device modelling and simulation Real-time simulation of power electronic circuits and systems

Work Experience :University of Illinois: as a graduate student, worked on fabrication of HEMT`s and Monte Carlo simulation of compound semiconductor devices (1987-1992). Central Research Laboratory, Hitachi, Tokyo: as a Visiting Researcher, worked on simulation of MOS transistors